Carrier, method of manufacturing a carrier and an electronic device

ABSTRACT

The carrier ( 30 ) comprises a first etch mask ( 14 ), a first metal layer ( 11 ), an intermediate layer ( 12 ), a second metal layer ( 13 ) and a second etch mask ( 17 ). Both the first and the second etch mask ( 14, 17 ) can be provided in one step by means of electrochemical plating. After the first metal layer ( 11 ) and the intermediate layer ( 12 ) have been patterned through the first etch mask ( 14 ), an electric element ( 20 ) can be suitably attached to the carrier ( 30 ) using conductive means. In this patterning operation, the intermediate layer ( 12 ) is etched further so as to create underetching below the first metal layer ( 11 ). After the provision of an encapsulation ( 40 ), the second metal layer ( 13 ) is patterned through the second etch mask ( 17 ). In this manner, a solderable device ( 10 ) is obtained without a photolithographic step during the assembly process.

The invention relates to a method of manufacturing an electronic deviceprovided with an electric element and a carrier with a first side and asecond side, comprising a stack of a first patterned metal layer, apatterned intermediate layer and a second metal layer,

which method comprises the steps of:

placing an electric element on the first side of the carrier, contactsof the electric element being electroconductively connected to the firstmetal layer; and

providing an envelope around the electric element.

The invention further relates to a carrier having a first and a secondside, comprising a stack of a first metal layer, an intermediate layerand a second metal layer.

The invention also relates to a method of manufacturing a carrier with afirst side and an opposite second side, comprising the steps of:

providing a stack of a first metal layer, an intermediate layer and asecond metal layer, wherein the first and the second metal layer areelectroconductively interconnected, and wherein the first metal layer issituated on the first side; and

patterning the first metal layer in accordance with a desired pattern.

Such a carrier and such a method of manufacturing an electronic devicecomprising the carrier are known from EP-A 1.160.858. The known carrieris a carrier of Al, Cu, Fe—Ni alloy or of a stack of Cu—Al or Al—Cu—Al.The carrier is provided on the first side with the desired pattern andwith a conductive layer of at least one of the metals Ni, Au, Ag and Pd.In the manufacturing process of the device, after placing asemiconductor element and providing the envelope, the part of thecarrier wherein the pattern is not provided is removed. Subsequently, amask is photolithographically provided on the second side of thecarrier, after which contact surfaces or guide pins are formed.

A drawback of the known method resides in that a photolithographic stepis required after assembly of the electric element. This means that thisstep must be carried out in the assembly plant, which is undesirable onaccount of customarily prevailing conditions in such a plant.

Therefore it is a first object of the invention to provide a method ofmanufacturing an electronic device of the type mentioned in the openingparagraph, wherein no photolithographic step is required after theplacement of the electric element, which method nonetheless yields acompact and sufficiently sturdy device.

The first object is achieved in that the carrier comprises an etch maskon the second side, and the first metal layer of said carrier iselectroconductively connected to the second metal layer and has partsprojecting with respect to the intermediate layer. After the provisionof the envelope, which preferably envelops the electric elemententirely, the second metal layer is etched from the second side of thecarrier in accordance with the pattern defined by the etch mask.

In the method in accordance with the invention, the second metal layerof the carrier is not removed completely, but is rather used to definetherein the contact surfaces and any other patterns. Advantageously, thepattern is fixed by means of the etch mask, which has been providedbefore the assembly process.

The fact that the second layer is not removed means that the carrier isattached to the envelope. To make sure that the carrier is properlyattached to the envelope, the first metal layer of the carrier ismechanically anchored in the envelope. For this purpose, the first metallayer and the intermediate layer are patterned such that the first metallayer has parts projecting with respect to the intermediate layer. Theparts thus project in a direction parallel to the sides of the carrier.The intermediate layer is patterned preferably by means of etching, anetchant being used that is selective with respect to the first metallayer. This results in a degree of underetching of the first metallayer, which is found to be sufficient for mechanical anchoring.

The build-up of the carrier is such that the thickness of each of theconstituent layers can be kept down. After all, the mechanical stabilityis not determined by the first metal layer but by the carrier as awhole. As the resolution of the pattern is also determined by the layerthickness, the invention enables a carrier with a first metal layerhaving a very high resolution to be obtained. This effect enablesfurther miniaturization as well as a specific definition of tracks, asis desirable for fine-pitch and high-frequency applications.

An advantage of the method is that it enables a great variety ofelectronic devices to be manufactured. In particular, the method issuited for semiconductor devices, but also other devices with sensors,micro-electromechanical system (MEMS) elements or display devices can bemanufactured by means of said method.

A first group of devices are compact semiconductor devices comprisingseveral to approximately forty contact surfaces. This is the case, inparticular, because high-resolution patterns can be defined in the firstmetal layer, while the second metal layer may comprise contact surfaceswhich are spaced apart sufficiently to be able to apply solder to themusing standard equipment.

A second group of devices includes semiconductor devices comprising morethan one electric element, which electric elements must beinterconnected. As the first and the second metal layer are patternedindependently, interconnect tracks from a first to a second element canbe defined in the first metal layer. These interconnect tracks areabsent from the pattern in the second metal layer. Thus the risk ofundesirable contact between such interconnect tracks and a circuit boardduring the provision of solder on the second side of the carrier isabsent.

A particularly advantageous example of such an application is found in adevice comprising first of all an integrated circuit and, in addition,one or more diodes for protection purposes as the elements. For thediodes use can be made, in this case, of, for example, diodes with SMDcontacts.

In a further embodiment of the method, the electric element is situatedin a cavity in a substrate, said cavity being filled when the envelopeis provided around the element. This embodiment is particularlyadvantageous for devices operating at high powers, because saidembodiment enables a heat conductive layer to be applied to the bottomof the cavity. The embodiment is also suitable for modules, inparticular modules with high-power elements, such as amplifiers. Thus,various components can be accommodated in different cavities andcontacted and conductively interconnected via the three-layer ormultilayer carrier. It is also possible to define contact surfaces inthe first metal layer for contacting conductors on the substrate.

In a favorable embodiment, the etch mask has an adhesive layer forsolder, which adhesive layer is also present on the first side of thecarrier. A first advantage of this embodiment is that the adhesive layercan be deposited during the manufacture of the carrier. A secondadvantage is that the adhesive layer can also be used as an etch mask. Athird advantage is that the adhesive layer can be provided on the firstside and on the second side of the carrier in a single process.

Patterning of the first metal layer and the intermediate layer can takeplace during the manufacture of the carrier as well as during theassembly process, prior to the placement of the electric element. If themetal layers are very thin, generally less than approximately 30 μm, itmay be favorable if patterning of these layers forms part of theassembly process. In this case, the risk of fracture or deformation ofthe carrier during transport is absent. Also the risk that the holes inthe first metal layer and the intermediate layer are contaminated withdust or otherwise is absent. Such contamination may weaken the adhesionof the carrier to the envelope.

It is also favorable if, prior to placing the electric element, a liquidor liquefiable layer is applied to the first side of the carrier. If aliquefiable layer is used, a heating step is carried out after theelectric element has been placed to liquefy said liquefiable layer. Byusing such a layer, which is described in the non-prepublished patentapplication EP 02077228.1 (PHNL020471) deformation of the solder ormetal bump is counteracted. The use of such metal or solder bumps isknown and has a favorable effect on the process of interconnecting theelement and the first metal layer. Alternatively, for example aconductive adhesive or a number of bonding wires may be used toestablish said connection.

The method in accordance with the invention can be advantageouslyapplied particularly in combination with the carrier in accordance withthe invention.

It is a second object of the invention to provide a carrier of the typementioned in the opening paragraph, by means of which a compact andnevertheless sturdy electronic device can be manufactured without aphotolithographic step being required after the assembly of an electricelement on the carrier.

Said second object is achieved in that the carrier comprises a stack ofa first etch mask, a first metal layer, an intermediate layer, a secondmetal layer and a second etch mask, the first etch mask being situatedon the first side of the carrier, and the second etch mask beingsituated on the second side of the carrier.

The carrier in accordance with the invention differs from the knowncarrier in that an etch mask is present on the first side as well as onthe second side. By virtue thereof, it is possible to define independentpatterns in the first and the second metal layer.

In a favorable embodiment, at least the second etch mask comprises anadhesive layer for solder. Examples of such adhesive layers are, interalia, layers containing at least one of the metals Ag, Pd, Au and Ni.Alternatively, for eutectic soldering use can be made of an alloy withAu and Ge, such as Ti—Ni—Au—Ge. The etch mask may be composed of theadhesive layers, but alternatively additional layers may be present suchas, for example, a photoresist. Such a photoresist has the advantagethat it forms a protective layer for the adhesive layer during thetransport of the carrier. It has been found that the second metal layer,for example of Cu, can be etched at a sufficiently good etching rate andetching selectivity with respect to this adhesive layer. For the etchantuse is made, for example, of a solution of Na₂S₂O₈/H₂SO₄. The adhesivelayer can be advantageously provided in accordance with a pattern bymeans of a plating process, such as electroplating.

In a further embodiment, also the first etch mask has an adhesive layerfor solder, which adhesive layer has the same composition as theadhesive layer in the second etch mask. Such a carrier can be obtainedin a simple manner by immersing the entire carrier in a bath. In thisprocess, the adhesive layer is deposited on the first and the secondside of the carrier at locations where said carrier is uncovered. Anadditional advantage of the use of the same adhesive layer resides inthat the number of etchants is limited. By virtue of the intermediatelayer, the second metal layer will not be attacked during etching thefirst metal layer.

In a particularly advantageous embodiment, a multilayer having Ni, Pdand Au sub-layers can be used as the adhesive layer. This layer issuitable for placing the electric element and for electroconductivelyconnecting the electric element, and it is also suitable for use as anetch mask and for soldering the electronic device.

The intermediate layer of the carrier is most preferably made from amaterial that can be selectively etched with respect to the first metallayer. Preferably use is made of a metal, which has the advantage thatthe intermediate layer does not have to be separately patterned.Examples of suitable metals include Al, alloys of Al, FeNi, FeCrNi andstainless steel. Preferably it has a thickness between 10 and 100 μm,more preferably between 20 and 50 μm. Preferably the first and thirdmetal layer have a thickness between 5 and 50 μm, by further preferencebetween 10 and 40 μm.

It is particularly favorable if a metal that serves as a solder stop isused for the intermediate layer, in particular a metal or alloy which iselectroconductive but not subject to moistening by solder. Particularlyfavorable results are achieved when use is made of Al or an alloy of Alas the intermediate layer, and first and second metal layers of Cu.Alloys of Al that can be used comprise inter alia Al_(x)Si_(1-x),Al_(x)Cu_(1-x) and Al_(x)Ge_(1-x), wherein preferably 0.5≦x≦0.99.

Alternatively, the intermediate layer may contain an insulatingmaterial, in which case conductive connections are provided in saidintermediate layer. Such conductive connections can be obtained, forexample, by applying a conductive layer from a solution after patterningthe intermediate layer, and reinforcing said conductive layer by meansof a plating process. Examples of conductive layers that can be appliedfrom solution include inter alia a layer of a conductive polymer such aspolyethylene dioxythiophene (PEDOT) and a silver layer formed by meansof sol-gel processing. The intermediate layer may alternatively comprisea stack of sub-layers.

A third object of the invention is to provide a method of manufacturinga carrier, by means of which layers having a desired pattern can beprovided on two opposite sides in a limited number of steps:

providing a stack of a first metal layer, an intermediate layer and asecond metal layer, wherein the first and the second metal layer areelectroconductively interconnected, and wherein the intermediate layercomprises a material that can be selectively etched with respect to thefirst metal layer, and wherein the first metal layer is situated on thefirst side;

applying and patterning a photosensitive layer on the second side; and

electrochemically providing an adhesive layer for solder on the firstand the second side.

In the method in accordance with the invention, the adhesive layers areelectrochemically provided on both sides of the carrier in a singlestep. In this manner a carrier having the desired functionality isobtained in a simple manner. If the carrier is used, the adhesive layeron the second side can serve as an etch mask.

In a favorable embodiment, the adhesive layer is applied to the firstside after a photosensitive layer has been applied to said first side inaccordance with the pattern desired for the first metal layer. Thisphotosensitive layer is removed after the adhesive layer has beenapplied, after which the adhesive layer serves as an etch mask for thefirst metal layer. This metal layer is patterned by means of etching,after which the intermediate layer is patterned by etching using anetchant which is selective with respect to the first and the third metallayer. In this process, underetching occurs with respect to the firstmetal layer. For the photosensitive layer use is made of, for example,SP2029-1 by Shipley. After curing, this layer exhibits sufficientmechanical stability. Thus, during applying the photosensitive layer tothe second side, the carrier can be allowed to rest, without anyproblem, on the developed and patterned photosensitive layer on thefirst side.

Favorable adhesive layers comprise one or more metals selected from thegroup composed of Ni, Pd, Ag and Au. The metals can be present assub-layers but also as an alloy.

These and other aspects of the carrier and the methods of manufacturingthe carrier and the electronic device in accordance with the inventionare apparent from and will be elucidated with reference to theembodiment(s) described hereinafter.

In the drawings:

FIG. 1 is a diagrammatic cross-sectional view of a first embodiment ofthe electronic device;

FIG. 2 is a diagrammatic plan view of the first embodiment;

FIG. 3 is a diagrammatic cross-sectional view of a second embodiment ofthe electronic device; and

FIGS. 4-9 show steps in the methods of manufacturing the carrier and theelectronic device as shown in FIG. 3.

The figures are not drawn to scale. Like reference numerals refer tolike parts. Alternative embodiments are possible within the scope ofprotection of the appended claims.

FIG. 1 is a diagrammatic cross-sectional view of a first embodiment ofan electronic device 10. In this case, said electronic device is asemi-discrete semiconductor device with five contacts. This however isby no means essential. FIG. 2 is a diagrammatic plan view of the firstembodiment, wherein the line A-A indicates the cross-section of FIG. 1.The semiconductor device comprises a carrier 30 with a first metal layer11, an intermediate layer 12 and a second metal layer 13. In thisexample, the first and the second metal layer 11, 13 comprise Cu, andthe intermediate layer comprises Al_(0.99)Si_(0.01). Furthermore, thecarrier 30 comprises a first etch mask 14 and a second etch mask 17. Thefirst and the second etch mask 14, 17 each comprise an adhesive layer ofNiPdAu. The carrier 30 is patterned from the first side by means of thefirst etch mask 14, thereby forming apertures 15 and connectionconductors 31-35. For this purpose use is made of an etching processwherein first the first metal layer 11 is etched and subsequently theintermediate layer 12 is etched, thereby forming recesses 16 in the sidefaces of the connection conductors 31-35. Subsequently, thesemiconductor element 20 having connection regions 21 is connected tothe connection conductors 31-35 by connection means 22, in this casebumps of Au. For this purpose, use is made of a flip-chip technique.Subsequently the envelope 40 is provided, resulting in the formation ofa mechanical anchor since the envelope 40 extends into the recesses 16of the carrier. Subsequently, the second metal layer 13 is patterned bymeans of the second etch mask 17. This is achieved by placing the devicein an etch bath that selectively removes the second metal layer 13 withrespect to the intermediate layer as well as with respect to the secondetch mask 17. The apertures 15 are subsequently also used to separatethe semiconductor devices 10. This has the additional advantage that themechanical anchoring substantially encapsulates the connectionconductors 31-35, i.e. not only at the location of the semiconductorelement 20 but also beyond said element. The size of the semiconductordevice 10 is, for example, approximately 1 by 1 mm. The opening 15 has awidth of, for example, 40-100 μm. The thicknesses of the first metallayer 11, the intermediate layer 12 and the second metal layer 13 werechosen to be, respectively, 30 μm, 40 μm and 30 μm.

FIG. 3 is a diagrammatic cross-sectional view of a second embodiment ofthe device 10 in accordance with the invention, in this case asemiconductor device. This device 10 comprises a semiconductor element20 that is present on a carrier 30. Said carrier 30 has a first side 1and a second side 2 and comprises a number of connection conductors 31,32, 33. Said connection conductors 31, 32, 33 having side faces aremutually isolated by apertures 15. Between the connection conductors 31,32, 33 and connection regions 21 in the semiconductor element 20 thereare connection means, in this case bonding wires 22. In this example,the semiconductor element 20 is attached to the first side 1 of thecarrier 30 by means of an adhesive layer 23. The semiconductor element20 and the bonding wires 22 are encapsulated by an envelope 40. Thisenvelope 40 extends into the apertures 15 of the carrier 30.

In accordance with the invention, recesses 16 are present in the sidefaces of the connection conductors 31, 32, 33. These recesses 16 arefilled with the envelope 40, as a result of which the first layer 31 ispartly clamped by the envelope 40. This ensures that the envelope 40 ismechanically anchored in the carrier 30, leading to excellent adhesionand mechanical strength. In this case, adhesion-improving means do nothave to be provided on the first side 1 of the carrier. The first side 1can also be optimized for the placement of the semiconductor element 20and the bonding wires 22.

In accordance with a further feature of the invention, a second adhesivelayer 17 is present on the second side of the carrier 30, and the secondmetal layer 13 has the same pattern as the second adhesive layer 17. Asa result, the device can be manufactured without a photolithographicstep being necessary during assembling electric element 20 on thecarrier 30. The second adhesive layer 17 also serves as an adhesivelayer for solder, which can be used to place the device 10 on a printedcircuit board.

In this embodiment, the carrier 30 is composed of a first metal layer11, an intermediate layer 12 and a second metal layer 13. The firstmetal layer 11 and the second metal layer 13 comprise mainly copper, andthe intermediate layer 12 comprises mainly aluminum. The recesses 16 inthe second layer 12 are formed by means of etching, as will be explainedwith reference to FIGS. 4-9. The first and second-adhesive layerscomprise NiPdAu or NiPd. As will be understood by persons skilled in theart, the adhesive layers 14, 17 may also comprise a different suitablematerial. Through the openings 15 which extend as far as the second sideof the carrier 30, the second metal layer 13 is patterned so as to formcontact surfaces, in this case for a bipolar transistor. The connectionconductor 32 is connected to ground and serves as a heat sink.

FIGS. 4-12 show various steps in the methods in accordance with theinvention, which lead to the second embodiment as shown in FIG. 1. FIGS.4 and 5 relate to the method of manufacturing the carrier 30. The FIGS.7, 8 and 9 relate to the method of manufacturing the device 10. FIG. 6relates to two steps which can be carried out in the manufacture of thecarrier 30 as well as in the manufacture of the device 10. The methodsshown here have the advantage that they can be carried out without alithographic step being required after the provision of the envelope,while at the same time the adhesion to the envelope 40 is very good andthe carrier 30 does not disintegrate before the enveloping step.

FIG. 4 shows the carrier 30 after a first step wherein a first metallayer 11 of Cu, an intermediate layer 12 of Al and a second metal layer13 of Cu are adhered to each other. It is possible to use theintermediate layer 12 as the starting layer, and provide a layer of Cuon either side thereof. Alternatively, the carrier 30 may be formed byrolling together the layers 11, 12, 13, which technique is customarilyused to form bilayers. Said rolling process can also take place in twosteps. It is also possible that eventually a four-layer or multilayercarrier is formed. The layers 11, 12, 13 had a thickness of 70 μm in afirst experiment. The thickness may vary, however, between 10 μm and 1.0mm, and the layers 11-13 do not have to be equal in thickness. If thefirst metal layer 11 is comparatively thin, it is preferably made of amaterial having a great mechanical strength and rigidity, such as anickel-iron alloy. In combination with said material, copper can be usedas the material for the intermediate layer 12. A heat treatment may bedone to improve the adhesion between the layers 11, 12, 13, if thisshould be necessary.

FIG. 5 shows the carrier 30 after a first etch mask 14 is provided onthe first side 1, and a second etch mask 17 is provided on the secondside 2. Said etch masks are provided by applying a photoresist (forexample SP2029-1 by Shipley) to successively the first side 1 and thesecond side 2 and subsequently patterning said photoresist. In thepatterning operation, the photomask is also cured. The first side 1 andthe second side 2 have different patterns. After the photoresist on thefirst side 1 has been patterned, the carrier 30 is turned upside down,after which the photoresist is applied to the second side. Subsequently,Ni, Pd and Au are successively provided on the carrier. Ag is analternative. After this, the carrier is ready. Preferably thephotoresist is removed. However, the photoresist may also be maintainedto serve as a protective layer.

FIG. 6 shows the carrier 30 after the following steps have been carriedout. First of all, the photoresist used as a protective layer isremoved. Subsequently the carrier 30 is treated in a number of baths;first the carrier 30 is etched in a bath of a Na₂S₂O₄/H₂SO₄ solution for5 to 10 minutes at 45° C. As a result, the first metal layer is etchedin accordance with a pattern defined by the first etch mask 14. Next thecarrier 30 is treated in a bath of a concentrated solution of KOH for 3minutes, as a result of which the intermediate layer 12 of Al is etchedand recesses 16 are formed. After said three minutes the recesses had awidth of 70 μm. A width of 10-20 μm is sufficient to obtain the desiredmechanical anchoring. Such a width additionally has the advantage thatthe connection conductors can be miniaturized; for a connectionconductor having a width of approximately 100 μm, wherein recesses 16are formed at two side faces, the width of the recess is approximately30 μm at the most.

FIG. 7 shows the carrier 30 after semiconductor elements 20 are attachedto the carrier 30 and bonding wires 22 are provided between theconnection regions 21 of the semiconductor elements 20 and theconnection conductors 31, 33. Although only a single element 20 isshown, in practice a large number of elements are placed on one carrier30, which will only be separated at a later stage.

FIG. 8 shows the carrier 30 after the envelope 40 has been provided onthe first side 1. As the second metal layer 13 is not patterned yet, itserves as a barrier for the enveloping material. This material alsoenters the recesses 16, thereby causing the first metal layer 11 to bemechanically anchored in the envelope 40. The envelope 40 is provided atthe level of the carrier. The adhesion between the envelope 40 and thecarrier can be further improved by providing the first metal layer 11and hence the etch mask 14 with a rough surface. At the locations wherethe wire bonds must be provided, however, this surface is planarized bya planarization step. This planarization step is carried out alreadybefore the carrier 30 is provided with the etch mask 14, 17. For theplanarization step use can be made, for example, of a roller thatsmoothens the outermost surface, while leaving open some holes belowthis surface for the adhesion of the envelope.

FIG. 9 shows the carrier 30 with element 20 and envelope 40 after thesecond metal layer 13 has been patterned. This is achieved by placing orimmersing the carrier 30 with the second side 2 in a bath ofNa₂S₂O₄/H₂SO₄ solution for 5 to 10 minutes at 45° C. The pattern ischosen to be such that separation lanes are defined wherein the carrier30 is removed entirely. After cutting the envelope 40 along theseseparation lanes, for example by means of sawing, a finished device 10is obtained.

1. An electronic device comprising a carrier having, between a firstside and an opposite second side, a first etch mask, a first patternedmetal layer, a patterned intermediate layer, a second patterned metallayer and a second etch mask for use of etching of the second metallayer, wherein the first and second etch mask each have an adhesivelayer for solder, wherein the first patterned metal layer iselectroconductively connected to a first electric element and to thesecond metal layer, and the first patterned metal layer further includesparts projecting with respect to the intermediate layer, the projectingparts of the first metal layer are anchored in an envelope in which thefirst electric element is present on the first side of the carrier,wherein contacts of the electric element are electroconductivelyconnected to the first metal layer, and wherein the first electricelement and a second electric element are interconnected by aninterconnect track that is defined in the first metal layer, while acorresponding interconnect track is absent in the second metal layer. 2.The electronic device as recited in claim 1, wherein the first and thesecond etch mask comprise an adhesive layer for solder.
 3. Theelectronic device as recited in claim 2, wherein the adhesive layer forsolder comprises a material selected from the group composed of Ag,NiPd, NiPdAu.
 4. The electronic device as recited in claim 1, whereinthe intermediate layer comprises an electroconductive material that cansuitably be used as a solder stop.
 5. The electronic device as recitedin claim 4, wherein the intermediate layer comprises a material selectedfrom the group composed of Al, an alloy of Al, FeNi, FeCrNi andstainless steel, and that the first patterned metal layer and the secondpatterned metal layer contain copper.
 6. The electronic device asrecited in claim 1, wherein the intermediate layer is made from amaterial that can be selectively etched with respect to the firstpatterned metal layer.
 7. The electronic device as recited in claim 6,wherein the intermediate layer is a metal.
 8. The electronic device asrecited in claim 7, wherein the intermediate layer comprises a materialselected from the group composed of Al, an alloy of Al, FeNi, FeCrNi andstainless steel, and that the first patterned metal layer and the secondpatterned metal layer contain copper.
 9. The electronic device asrecited in claim 1, wherein the first electric element is asemiconductor element which is placed on the first side of the carrierwith a flip-chip technique.
 10. The electronic device as recited inclaim 9, wherein connection conductors are defined in the secondpatterned metal layer and the corresponding etch mask, said connectionconductors are laterally displaced with respect to contacts in thesemiconductor element.